Behind the diplomatic euphemisms and trade negotiation theatrics, a tectonic shift is underway in the global semiconductor supply chain. China, the world’s largest consumer of semiconductors — importing over $400 billion worth of chips annually at its peak — has set an audacious target: ensuring that at least 70% of the advanced silicon wafers used in its domestic chip fabrication are sourced from Chinese manufacturers by the end of 2026. This target, first reported by Nikkei Asia and subsequently confirmed through industry channels, represents the most aggressive semiconductor localisation drive in modern industrial history.
The context is inseparable from geopolitics. Since 2022, the United States, joined by Japan and the Netherlands, has imposed increasingly stringent export controls on advanced semiconductor manufacturing equipment, EDA (electronic design automation) software, and high-bandwidth memory chips destined for China. These restrictions, targeting technologies essential for AI training chips and advanced logic fabrication, have created an existential imperative for China’s semiconductor industry: localise or be permanently dependent on adversarial supply chains.
Silicon wafers — the ultra-pure, mirror-flat discs of crystalline silicon upon which all integrated circuits are built — represent the foundational substrate of the entire chip industry. The global wafer market, dominated by Japanese firms (Shin-Etsu Chemical, SUMCO), German manufacturer Siltronic, South Korean SK Siltron, and Taiwan’s GlobalWafers, has historically supplied the vast majority of China’s fabrication needs. Chinese wafer manufacturers, led by Shanghai-based Zing Semiconductor (a subsidiary of National Silicon Industry Group), TCL Zhonghuan, and several state-backed entrants, have been rapidly scaling 12-inch (300mm) wafer production — the standard size for advanced chip manufacturing.
The 70% target is technically ambitious but not implausible. China’s 12-inch wafer production capacity has expanded dramatically, with Zing Semiconductor alone reportedly capable of producing over 500,000 wafers per month. However, quantity is only part of the equation. Wafer quality — measured in terms of crystal defect density, surface flatness, and contamination levels — must meet the exacting specifications of foundries such as SMIC (Semiconductor Manufacturing International Corporation), Hua Hong Semiconductor, and the growing number of Chinese fabs producing at mature process nodes (28nm and above).
The strategic calculus extends beyond wafers. China’s semiconductor localisation campaign encompasses the entire supply chain: photoresists, etchants, deposition gases, CMP (chemical mechanical planarisation) slurries, and, most critically, lithography equipment. While ASML’s extreme ultraviolet (EUV) lithography machines remain beyond China’s current manufacturing capability, Chinese firms — notably Shanghai Micro Electronics Equipment (SMEE) — have made significant progress in deep ultraviolet (DUV) lithography systems capable of producing chips at 28nm and potentially 14nm through multi-patterning techniques.
The implications for the global semiconductor industry are profound. If China succeeds in substantially localising its wafer supply, the revenue impact on Japanese and European wafer manufacturers could be significant — potentially reducing their China-derived revenues by 30–40% over the next three to five years. This, in turn, could affect their R&D investment capacity and global pricing dynamics.
For the AI industry specifically, the wafer localisation drive is intimately connected to China’s ambitions in AI chip development. Companies such as Huawei (through its HiSilicon subsidiary), Cambricon Technologies, and Biren Technology are designing AI training and inference chips that require high-quality wafer substrates. Ensuring domestic wafer supply insulates these AI chip programmes from potential future supply disruptions.
However, significant challenges remain. The most advanced wafers — those required for sub-7nm fabrication — demand levels of purity and crystallographic perfection that Chinese manufacturers have not yet consistently demonstrated at scale. The equipment required for wafer manufacturing (crystal pullers, wire saws, polishing systems) itself has supply chain dependencies that mirror the broader chip equipment challenge.
The geopolitical feedback loop is also worth noting. China’s localisation success could paradoxically intensify Western export controls, as policymakers in Washington, Tokyo, and The Hague may conclude that remaining leverage points must be exploited before they become irrelevant. Conversely, failure to localise would validate the containment strategy and potentially embolden further restrictions. What is beyond dispute is that the 70% wafer target represents a fundamental restructuring of the semiconductor supply chain’s geographic architecture. The era of seamless, borderless chip manufacturing — where wafers flowed freely from Japan to China to Taiwan to the world — is giving way to a fragmented, bloc-based industrial order. The silicon curtain, it appears, is descending.
– Rashmi Kumari
